Low Temperature Cu to Cu Direct Bonding for Packaging Application in Semiconductor Industry
Miss Yi Wang
PhD candidate in the Mechanical Engineering Dept.
Date & Time
Friday, 16 April 2021
The increasing demand for system performance enhancement and more functionality has led to the exploration of 3-D IC technology, which possesses attractive benefits in form factor, density, performance, heterogeneous integration, and lower cost. One of the key challenges to realize 3-D integration is to develop a robust bonding technique. While solder-based technology appears to be a convenient way (since it is widely used in the packaging community) for 3-D stacking, it is inadequate to meet the increasing needs for fine pitch and reliable vertical interconnection in stacked ICs. Among various emerging bonding methods, Cu-Cu bonding is an attractive option because it is able to provide strong mechanical strength to support stacked layers and conduct current effectively with its intrinsic bonding medium. In addition, wafer-to wafer (W2W) bonding scheme is gaining favourable attention for the feature of higher manufacturing throughput than chip-to-wafer or chip-to-chip. In this presentation, a brief introduction on current development in 3-D IC technology would be provided with a more detailed review of various bonding enhancement methods.